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Network on chip

Inserting Data Encoding Techniques into NoC-Based Systems

Logic / Probability / Power Consumption / Encoding / Network on chip / System modeling / Power Saving / Network on a Chip / System modeling / Power Saving / Network on a Chip

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An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS

Network on chip / Very high throughput / Solid State Devices and Circuits / MESH NETWORK / Floating Point / Electrical And Electronic Engineering / Leakage Reduction / Clock gating / Electrical And Electronic Engineering / Leakage Reduction / Clock gating

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